Finite-impulse response (FIR) Filter is widely used in wireless sensor networks as a signal pre-processing step. Because sensor nodes require a long working periods and ultra-low cost, traditional FIR structures are in applicable as multipliers occupy too much die size for such node’s chips. This paper proposes novel FIR filter structures used in the design of application specific integrated circuits (ASICs) for sensor nodes, which can reduce the hardware cost to a minimum. The experiments show that the proposed FIR structure can lead to significant hardware savings from the traditional FIR filter. It’s a better choice for sensor node ASICs